PIC16LF18854 Datasheet, PDF (297/668 Pages) Microchip Technology – C Compiler Optimized RISC Architecture

PIC16(L)F18856/76
FIGURE 20-5:
CWG OUTPUT BLOCK DIAGRAM
CWG_dataA
POLA
CWG_dataB
POLB
CWG_dataC
POLC
CWG_dataD
POLD
LSAC<1:0>
‘1’
11
‘0’
10
High Z
01
1
00
OVRA
0
STRA⁽¹⁾
LSBD<1:0>
‘1’
11
‘0’
10
High Z
01
1
00
OVRB
0
STRB⁽¹⁾
LSAC<1:0>
‘1’
11
‘0’
10
High Z
01
1
00
OVRC
0
STRC⁽¹⁾
LSBD<1:0>
‘1’
11
‘0’
10
High Z
01
1
00
OVRD
0
STRD⁽¹⁾
CWG_shutdown
Rev. 10-000171B
9/24/2014
RxyPPS
TRIS Control
1
PPS
0
CWGxA
RxyPPS
TRIS Control
1
PPS
0
CWGxB
RxyPPS
TRIS Control
1
PPS
0
CWGxC
RxyPPS
TRIS Control
1
PPS
0
CWGxD
Note 1: STRx is held to 1 in all modes other than Output Steering Mode.
 2016 Microchip Technology Inc.
Preliminary
DS40001824A-page 297