PIC16LF18854 Datasheet, PDF (577/668 Pages) Microchip Technology – C Compiler Optimized RISC Architecture

PIC16(L)F18856/76
REGISTER 33-4: RC1REG⁽¹⁾: RECEIVE DATA REGISTER
R-0
R-0
R-0
R-0
R-0
R-0
RC1REG<7:0>
bit 7
R-0
R-0
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
bit 7-0
RC1REG<7:0>: Lower eight bits of the received data; read-only; see also RX9D (Register 33-2)
Note 1: RCREG (including the 9^th bit) is double buffered, and data is available while new data is being received.
REGISTER 33-5: TX1REG⁽¹⁾: TRANSMIT DATA REGISTER
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
TX1REG<7:0>
bit 7
R/W-0
R/W-0
R/W-0
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
bit 7-0
TX1REG<7:0>: Lower eight bits of the received data; read-only; see also RX9D (Register 33-1)
Note 1: TXREG (including the 9th bit) is double buffered, and can be written when previous data has started
shifting.
REGISTER 33-6: SP1BRGL⁽¹⁾: BAUD RATE GENERATOR REGISTER
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
SP1BRG<7:0>
bit 7
R/W-0
R/W-0
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
bit 7-0
SP1BRG<7:0>: Lower eight bits of the Baud Rate Generator
Note 1: Writing to SP1BRG resets the BRG counter.
 2016 Microchip Technology Inc.
Preliminary
DS40001824A-page 577