PIC16LF18854 Datasheet, PDF (220/668 Pages) Microchip Technology – C Compiler Optimized RISC Architecture

PIC16(L)F18856/76
REGISTER 12-27: ODCONC: PORTC OPEN-DRAIN CONTROL REGISTER
R/W-0/0
ODCC7
bit 7
R/W-0/0
ODCC6
R/W-0/0
ODCC5
R/W-0/0
ODCC4
R/W-0/0
ODCC3
R/W-0/0
ODCC2
R/W-0/0
ODCC1
R/W-0/0
ODCC0
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
bit 7-0
ODCC<7:0>: PORTC Open-Drain Enable bits
For RC<7:0> pins, respectively
1 = Port pin operates as open-drain drive (sink current only)
0 = Port pin operates as standard push-pull drive (source and sink current)
REGISTER 12-28: SLRCONC: PORTC SLEW RATE CONTROL REGISTER
R/W-1/1
SLRC7
bit 7
R/W-1/1
SLRC6
R/W-1/1
SLRC5
R/W-1/1
SLRC4
R/W-1/1
SLRC3
R/W-1/1
SLRC2
R/W-1/1
SLRC1
R/W-1/1
SLRC0
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
bit 7-0
SLRC<7:0>: PORTC Slew Rate Enable bits
For RC<7:0> pins, respectively
1 = Port pin slew rate is limited
0 = Port pin slews at maximum rate
REGISTER 12-29: INLVLC: PORTC INPUT LEVEL CONTROL REGISTER
R/W-1/1
INLVLC7
bit 7
R/W-1/1
INLVLC6
R/W-1/1
INLVLC5
R/W-1/1
INLVLC4
R/W-1/1
INLVLC3
R/W-1/1
INLVLC2
R/W-1/1
INLVLC1
R/W-1/1
INLVLC0
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
bit 7-0
INLVLC<7:0>: PORTC Input Level Select bits
For RC<7:0> pins, respectively
1 = ST input used for PORT reads and interrupt-on-change
0 = TTL input used for PORT reads and interrupt-on-change
DS40001824A-page 220
Preliminary
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