PIC16LF18854 Datasheet, PDF (28/668 Pages) Microchip Technology – C Compiler Optimized RISC Architecture

PIC16(L)F18856/76
TABLE 1-3: PIC16F18876 PINOUT DESCRIPTION (CONTINUED)
Name
RB2/ANB2/SDA2^(3,4)/SDI2⁽¹⁾/
CWG3IN⁽¹⁾/IOCB2
Function
RB2
ANB2
SDA2^(3,4)
SDI2⁽¹⁾
CWG3IN⁽¹⁾
Input Type
TTL/ST
AN
I²C/SMBus
TTL/ST
TTL/ST
Output Type
Description
CMOS/OD General purpose I/O.
—
ADC Channel B2 input.
OD
MSSP2 I²C serial data input/output.
—
MSSP2 SPI serial data input.
—
Complementary Waveform Generator 3 input.
IOCB2
TTL/ST
—
Interrupt-on-change input.
RB3/ANB3/C1IN2-/C2IN2-/IOCB3
RB3
TTL/ST
CMOS/OD General purpose I/O.
ANB3
AN
—
ADC Channel B3 input.
C1IN2-
AN
—
Comparator negative input.
C2IN2-
AN
—
Comparator negative input.
RB4/ANB4/ADCACT⁽¹⁾/T5G⁽¹⁾/
SMTWIN2⁽¹⁾/IOCB4
IOCB3
RB4
ANB4
ADCACT⁽¹⁾
T5G⁽¹⁾
SMTWIN2⁽¹⁾
TTL/ST
TTL/ST
AN
TTL/ST
TTL/ST
TTL/ST
—
CMOS/OD
—
—
—
—
Interrupt-on-change input.
General purpose I/O.
ADC Channel B4 input.
ADC Auto-Conversion Trigger input.
Timer5 gate input.
Signal Measurement Timer2 (SMT2) window input.
RB5/ANB5/T1G⁽¹⁾/SMTSIG2⁽¹⁾/
CCP3⁽¹⁾/IOCB5
RB6/ANB6/CLCIN2⁽¹⁾/IOCB6/
ICSPCLK
IOCB4
RB5
ANB5
T1G⁽¹⁾
SMTSIG2⁽¹⁾
CCP3⁽¹⁾
IOCB5
RB6
ANB6
CLCIN2⁽¹⁾
TTL/ST
TTL/ST
AN
TTL/ST
TTL/ST
TTL/ST
TTL/ST
TTL/ST
AN
TTL/ST
—
CMOS/OD
—
—
—
CMOS/OD
—
CMOS/OD
—
—
Interrupt-on-change input.
General purpose I/O.
ADC Channel B5 input.
Timer1 gate input.
Signal Measurement Timer2 (SMT2) signal input.
Capture/compare/PWM3 (default input location for capture
function).
Interrupt-on-change input.
General purpose I/O.
ADC Channel B6 input.
Configurable Logic Cell source input.
IOCB6
TTL/ST
—
Interrupt-on-change input.
RB7/ANB7/DAC1OUT2/T6IN⁽¹⁾/
CLCIN3⁽¹⁾/IOCB7/ICSPDAT
ICSPCLK
RB7
ANB7
ST
TTL/ST
AN
—
CMOS/OD
—
In-Circuit Serial Programming™ and debugging clock input.
General purpose I/O.
ADC Channel B7 input.
DAC1OUT2
T6IN⁽¹⁾
CLCIN3⁽¹⁾
—
TTL/ST
TTL/ST
AN
Digital-to-Analog Converter output.
—
Timer6 external digital clock input.
—
Configurable Logic Cell source input.
IOCB7
TTL/ST
—
Interrupt-on-change input.
ICSPDAT
ST
CMOS
In-Circuit Serial Programming™ and debugging data input/
output.
Legend: AN = Analog input or output
TTL = TTL compatible input
CMOS = CMOS compatible input or output
ST
= Schmitt Trigger input with CMOS levels
OD = Open-Drain
I²C = Schmitt Trigger input with I²CHV=
High Voltage XTAL= Crystal levels
Note 1: This is a PPS remappable input signal. The input function may be moved from the default location shown to one of several other PORTx
pins. Refer to Table 13-1 for details on which PORT pins may be used for this signal.
2: All output signals shown in this row are PPS remappable. These signals may be mapped to output onto one of several PORTx pin options
as described in Table 13-3.
3: This is a bidirectional signal. For normal module operation, the firmware should map this signal to the same pin in both the PPS input and
PPS output registers.
4: These pins are configured for I²C logic levels. The SCLx/SDAx signals may be assigned to any of the RB1/RB2/RC3/RC4 pins. PPS
assignments to the other pins (e.g., RA5) will operate, but input logic levels will be standard TTL/ST, as selected by the INLVL register,
instead of the I²C specific or SMBus input buffer thresholds.
DS40001824A-page 28
Preliminary
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