PIC16LF18854 Datasheet, PDF (53/668 Pages) Microchip Technology – C Compiler Optimized RISC Architecture

TABLE 3-13: SPECIAL FUNCTION REGISTER SUMMARY BANKS 0-31 (CONTINUED)
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on:
POR, BOR
Value on all
other Resets
Bank 2
CPU CORE REGISTERS; see Table 3-2 for specifics
10Ch
10Dh
10Eh
10Fh
110h
111h
112h
113h
114h
115h
116h
117h
118h
119h
11Ah
11Bh
11Ch
11Dh
11Eh
11Fh
Legend:
Note 1:
2:
ADCNT
ADCNT<7:0>
ADRPT
ADRPT<7:0>
ADLTHL
ADLTH<7:0>
ADLTHH
ADLTH<15:8>
ADUTHL
ADUTH<7:0>
ADUTHH
ADUTH<15:8>
ADSTPTL
ADSTPT<7:0>
ADSTPTH
ADSTPT<15:8>
ADFLTRL
ADFLTR<7:0>
ADFLTRH
ADFLTR<15:8>
ADERRL
ADERR<7:0>
ADERRH
ADERR<15:8>
—
—
Unimplemented
RC1REG
RC1REG<7:0>
TX1REG
TX1REG<7:0>
SP1BRGL
SP1BRGL<7:0>
SP1BRGH
SP1BRGH<7:0>
RC1STA
SPEN
RX9
SREN
CREN
ADDEN
FERR
OERR
TX1STA
CSRC
TX9
TXEN
SYNC
SENDB
BRGH
TRMT
BAUD1CON
ABDOVF
RCIDL
—
SCKP
BRG16
—
WUE
x = unknown, u = unchanged, q =depends on condition, - = unimplemented, read as ‘0’, r = reserved. Shaded locations unimplemented, read as ‘0’.
Register present on PIC16F18855/75 devices only.
Unimplemented, read as ‘1’.
RX9D
TX9D
ABDEN
xxxx xxxx
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
xxxx xxxx
xxxx xxxx
0000 0000
0000 0000
—
0000 0000
0000 0000
0000 0000
0000 0000
0000 000x
0000 0010
01-0 0-00
uuuu uuuu
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
uuuu uuuu
uuuu uuuu
0000 0000
0000 0000
—
0000 0000
0000 0000
0000 0000
0000 0000
0000 000x
0000 0010
01-0 0-00