PIC16LF18854 Datasheet, PDF (173/668 Pages) Microchip Technology – C Compiler Optimized RISC Architecture

PIC16(L)F18856/76
EXAMPLE 10-3: ERASING ONE ROW OF PROGRAM FLASH MEMORY (PFM)
; This sample row erase routine assumes the following:
; 1.A valid address within the erase row is loaded in variables ADDRH:ADDRL
; 2.ADDRH and ADDRL are located in common RAM (locations 0x70 - 0x7F)
BANKSEL
MOVF
MOVWF
MOVF
MOVWF
BCF
BSF
BSF
BCF
NVMADRL
ADDRL,W
NVMADRL
ADDRH,W
NVMADRH
NVMCON1,NVMREGS
NVMCON1,FREE
NVMCON1,WREN
INTCON,GIE
; Load lower 8 bits of erase address boundary
; Load upper 6 bits of erase address boundary
; Choose PFM memory area
; Specify an erase operation
; Enable writes
; Disable interrupts during unlock sequence
; -------------------------------REQUIRED UNLOCK SEQUENCE:------------------------------
MOVLW
MOVWF
MOVLW
MOVWF
BSF
55h
NVMCON2
AAh
NVMCON2
NVMCON1,WR
; Load 55h to get ready for unlock sequence
; First step is to load 55h into NVMCON2
; Second step is to load AAh into W
; Third step is to load AAh into NVMCON2
; Final step is to set WR bit
; --------------------------------------------------------------------------------------
BSF
INTCON,GIE
; Re-enable interrupts, erase is complete
BCF
NVMCON1,WREN
; Disable writes
TABLE 10-2: NVM ORGANIZATION AND ACCESS INFORMATION
Master Values
NVMREG Access
Memory
Function
Program
Counter (PC),
ICSP™
Address
Memory
Type
NVMREGS
bit
(NVMCON1)
NVMADR
<14:0>
Reset Vector
0000h
0
User Memory
0001h
0
0003h
PFM
INT Vector
0004h
0
User Memory
0005h
0
07FFh
User ID
8000h
PFM
1
8003h
Reserved
8004h
—
—
Rev ID
8005h
1
Device ID
8006h
1
CONFIG1
8007h
PFM
1
CONFIG2
8008h
1
CONFIG3
8009h
1
CONFIG4
800Ah
1
CONFIG5
800Bh
1
User Memory
F000h
EEPROM
1
F0FFh
0000h
0001h
0003h
0004h
0005h
07FFh
0000h
0003h
0004h
0005h
0006h
0007h
0008h
0009h
000Ah
000Bh
7000h
70FFh
Allowed
Operations
Read
Write
Read
Write
—
Read-0nly
Read
Write
FSR Access
FSR
Address
FSR
Programming
Address
8000h
8001h
8003h
8004h
8005h
FFFFh
Read-0nly
No Access
F000h
F0FFh
Read-0nly
 2016 Microchip Technology Inc.
Preliminary
DS40001824A-page 173