PIC16LF18854 Datasheet, PDF (442/668 Pages) Microchip Technology – C Compiler Optimized RISC Architecture

PIC16(L)F18856/76
REGISTER 29-2: TxCON: TIMER2/4/6 CONTROL REGISTER
R/W/HC-0/0
ON⁽¹⁾
bit 7
R/W-0/0
R/W-0/0
CKPS<2:0>
R/W-0/0
R/W-0/0
R/W-0/0
R/W-0/0
OUTPS<3:0>
R/W-0/0
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
HC = Bit is cleared by hardware
bit 7
bit 6-4
bit 3-0
ON: Timerx On bit
1 = Timerx is on
0 = Timerx is off: all counters and state machines are reset
CKPS<2:0>: Timer2-type Clock Prescale Select bits
111 = 1:128 Prescaler
110 = 1:64 Prescaler
101 = 1:32 Prescaler
100 = 1:16 Prescaler
011 = 1:8 Prescaler
010 = 1:4 Prescaler
001 = 1:2 Prescaler
000 = 1:1 Prescaler
OUTPS<3:0>: Timerx Output Postscaler Select bits
1111 = 1:16 Postscaler
1110 = 1:15 Postscaler
1101 = 1:14 Postscaler
1100 = 1:13 Postscaler
1011 = 1:12 Postscaler
1010 = 1:11 Postscaler
1001 = 1:10 Postscaler
1000 = 1:9 Postscaler
0111 = 1:8 Postscaler
0110 = 1:7 Postscaler
0101 = 1:6 Postscaler
0100 = 1:5 Postscaler
0011 = 1:4 Postscaler
0010 = 1:3 Postscaler
0001 = 1:2 Postscaler
0000 = 1:1 Postscaler
Note 1: In certain modes, the ON bit will be auto-cleared by hardware. See Section 29.5 “Operation Examples”.
DS40001824A-page 442
Preliminary
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