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PIC16LF18854 Datasheet, PDF (134/668 Pages) Microchip Technology – C Compiler Optimized RISC Architecture | |||
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PIC16(L)F18856/76
REGISTER 7-3: PIE1: PERIPHERAL INTERRUPT ENABLE REGISTER 1
R/W-0/0
R/W-0/0
U-0
U-0
U-0
U-0
OSFIE
CSWIE
â
â
â
â
bit 7
R/W-0/0
ADTIE
R/W-0/0
ADIE
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
â1â = Bit is set
W = Writable bit
x = Bit is unknown
â0â = Bit is cleared
U = Unimplemented bit, read as â0â
-n/n = Value at POR and BOR/Value at all other Resets
bit 7
bit 6
bit 5-2
bit 1
bit 0
OSFIE: Oscillator Fail Interrupt Enable bit
1 = Enables the Oscillator Fail Interrupt
0 = Disables the Oscillator Fail Interrupt
CSWIE: Clock Switch Complete Interrupt Enable bit
1 = The clock switch module interrupt is enabled
0 = The clock switch module interrupt is disabled
Unimplemented: Read as â0â
ADTIE: Analog-to-Digital Converter (ADC) Threshold Compare Interrupt Enable bit
1 = Enables the ADC threshold compare interrupt
0 = Disables the ADC threshold compare interrupt
ADIE: Analog-to-Digital Converter (ADC) Interrupt Enable bit
1 = Enables the ADC interrupt
0 = Disables the ADC interrupt
Note 1: Bit PEIE of the INTCON register must be set to enable any peripheral interrupt controlled by registers
PIE1-PIE8.
DS40001824A-page 134
Preliminary
ï£ 2016 Microchip Technology Inc.
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