PIC16LF18854 Datasheet, PDF (426/668 Pages) Microchip Technology – C Compiler Optimized RISC Architecture

PIC16(L)F18856/76
29.4 Timer2 Interrupt
Timer2 can also generate a device interrupt. The
interrupt is generated when the postscaler counter
matches one of 16 postscale options (from 1:1 through
1:16), which are selected with the postscaler control
bits, OUTPS<3:0> of the T2CON register. The interrupt
is enabled by setting the TMR2IE interrupt enable bit of
the PIE4 register. Interrupt timing is illustrated in
Figure 29-3.
FIGURE 29-3:
TIMER2 PRESCALER, POSTSCALER, AND INTERRUPT TIMING DIAGRAM
Rev. 10-000205A
1/8/2016
CKPS
0b010
PRx
1
OUTPS
2
TMRx_clk
TMRx
0
1
0
1
0
1
0
TMRx_postscaled
TMRxIF
(1)
DS40001824A-page 426
Preliminary
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