PIC16LF18854 Datasheet, PDF (371/668 Pages) Microchip Technology – C Compiler Optimized RISC Architecture

PIC16(L)F18856/76
REGISTER 23-27: ADERRL: ADC CALCULATION ERROR LOW BYTE REGISTER
R-x
R-x
R-x
R-x
R-x
R-x
R-x
ADERR<7:0>
bit 7
R-x
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
bit 7-0
ADERR<7:0>: ADC Calculation Error LSB. Least Significant Byte of ADC Calculation Error. Calcula-
tion is determined by ADCALC bits of ADCON3, see Register 21-1 for more details.
REGISTER 23-28: ADLTHH: ADC LOWER THRESHOLD HIGH BYTE REGISTER
R/W-x/x
R/W-x/x
R/W-x/x
R/W-x/x
R/W-x/x
R/W-x/x
R/W-x/x
ADLTH<15:8>
bit 7
R/W-x/x
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
bit 7-0
ADLTH<15:8>: ADC Lower Threshold MSB. ADLTH and ADUTH are compared with ADERR to set
the ADUTHR and ADLTHR bits of ADSTAT. Depending on the setting of ADTMD, an interrupt may be
triggered by the results of this comparison.
REGISTER 23-29: ADLTHL: ADC LOWER THRESHOLD LOW BYTE REGISTER
R/W-x/x
R/W-x/x
R/W-x/x
R/W-x/x
R/W-x/x
R/W-x/x
R/W-x/x
ADLTH<7:0>
bit 7
R/W-x/x
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
bit 7-0
ADLTH<7:0>: ADC Lower Threshold LSB. ADLTH and ADUTH are compared with ADERR to set the
ADUTHR and ADLTHR bits of ADSTAT. Depending on the setting of ADTMD, an interrupt may be
triggered by the results of this comparison.
 2016 Microchip Technology Inc.
Preliminary
DS40001824A-page 371