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PIC16LF18854 Datasheet, PDF (609/668 Pages) Microchip Technology – C Compiler Optimized RISC Architecture | |||
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PIC16(L)F18856/76
TABLE 37-3: POWER-DOWN CURRENT (IPD)(1,2)
PIC16LF18856/76
Standard Operating Conditions (unless otherwise stated)
PIC16F18856/76
Standard Operating Conditions (unless otherwise stated)
VREGPM = 1
Param.
No.
Symbol
Device Characteristics
Min.
Typ.â
Max.
+85°C
Max.
+125°C
Units
VDD
Conditions
Note
D200 IPD
IPD Base
â 0.05
2
9
ïA 3.0V
D200 IPD
D200A
IPD Base
â
0.4
4
â
10
15
12
ïA 3.0V
20
ïA 3.0V VREGPM = 0
D201
IPD_WDT
Low-Frequency Internal
Oscillator/WDT
â
0.4
â
â
ïA 3.0V
D201
IPD_WDT
Low-Frequency Internal
Oscillator/WDT
â
0.6
5
13
ïA 3.0V
D202 IPD_SOSC Secondary Oscillator (SOSC)
â
0.6
5
13
ïA 3.0V
D202 IPD_SOSC Secondary Oscillator (SOSC)
â
0.8
8.5
15
ïA 3.0V
D203 IPD_FVR FVR
â
8
18
â
ïA 3.0V
D203 IPD_FVR FVR
â
10
20
â
ïA 3.0V
D204 IPD_BOR Brown-out Reset (BOR)
â
9
14
18
ïA 3.0V
D204 IPD_BOR Brown-out Reset (BOR)
â
14
19
21
ïA 3.0V
D205 IPD_LPBOR Low-Power Brown-out Reset (LPBOR) â
0.5
â
â
ïA 3.0V
D205 IPD_LPBOR Low-Power Brown-out Reset (LPBOR) â
0.7
â
D206 IPD_ADCA ADC - Active
â 250
â
D206 IPD_ADCA ADC - Active
â 280
â
â
ïA 3.0V
â
ïA 3.0V ADC is converting (4)
â
ïA 3.0V ADC is converting (4)
D207 IPD_CMP Comparator
â
25
38
40
ïA 3.0V
D207 IPD_CMP Comparator
â
5
40
50
ïA 3.0V
â Data in âTyp.â column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not
tested.
Note 1: The peripheral current is the sum of the base IDD and the additional current consumed when this peripheral is enabled. The
peripheral â current can be determined by subtracting the base IDD or IPD current from this limit. Max. values should be used
when calculating total current consumption.
2: The power-down current in Sleep mode does not depend on the oscillator type. Power-down current is measured with the part
in Sleep mode with all I/O pins in high-impedance state and tied to VSS.
3: All peripheral currents listed are on a per-peripheral basis if more than one instance of a peripheral is available.
4: ADC clock source is FRC.
ï£ 2016 Microchip Technology Inc.
Preliminary
DS40001824A-page 609
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