PIC16LF18854 Datasheet, PDF (453/668 Pages) Microchip Technology – C Compiler Optimized RISC Architecture

PIC16(L)F18856/76
30.4 Register Definitions: CCP Control
Long bit name prefixes for the CCP peripherals are
shown in Section 1.1 “Register and Bit naming con-
ventions”.
TABLE 30-4: LONG BIT NAMES PREFIXES
FOR CCP PERIPHERALS
Peripheral
Bit Name Prefix
CCP1
CCP2
CCP3
CCP4
CCP5
CCP1
CCP2
CCP3
CCP4
CCP5
REGISTER 30-1: CCPxCON: CCPx CONTROL REGISTER
R/W-0/0
U-0
EN
—
bit 7
R-x
OUT
R/W-0/0
FMT
R/W-0/0
R/W-0/0
R/W-0/0
MODE<3:0>
R/W-0/0
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Reset
bit 7
EN: CCPx Module Enable bit
1 = CCPx is enabled
0 = CCPx is disabled
bit 6
Unimplemented: Read as ‘0’
bit 5
OUT: CCPx Output Data bit (read-only)
bit 4
FMT: CCPW (Pulse Width) Alignment bit
MODE = Capture mode
Unused
MODE = Compare mode
Unused
MODE = PWM mode
1 = Left-aligned format
0 = Right-aligned format
 2016 Microchip Technology Inc.
Preliminary
DS40001824A-page 453