PIC16LF18854 Datasheet, PDF (81/668 Pages) Microchip Technology – C Compiler Optimized RISC Architecture

TABLE 3-13: SPECIAL FUNCTION REGISTER SUMMARY BANKS 0-31 (CONTINUED)
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on:
POR, BOR
Value on all
other Resets
Bank 30 (Continued)
F5Ch
SLRCOND
—X
X—
SLRD7
SLRD6
SLRD5
SLRD4
SLRD3
Unimplemented
SLRD2
SLRD1
F5Dh
INLVLD
—X
X—
INLVLD7
INLVLD6
INLVLD5
INLVLD4
INLVLD3
Unimplemented
INLVLD2
INLVLD1
F5Eh
—
—
F60h
F61h
CCDND
—
—X
X—
CCDND7
CCDND6
CCDND5
Unimplemented
CCDND4
CCDND3
Unimplemented
CCDND2
CCDND1
F62h
CCDPD
—X
X—
CCDPD7
CCDPD6
CCDPD5
CCDPD4
CCDPD3
Unimplemented
CCDPD2
CCDPD1
F63h
—
—
—X
—
—
—
F64h
ANSELE
X—
Unimplemented
—
—
Unimplemented
ANSE2
ANSE1
—X
—
—
—
F65h
WPUE
X—
—
—
—
—
WPUE3
WPUE2
WPUE1
—
WPUE3
—
—
—X
—
—
—
F66h
ODCONE
X—
—
—
Unimplemented
ODCE2
ODCE1
—X
—
—
—
F67h
SLRCONE
X—
—
—
Unimplemented
SLRE2
SLRE1
—X
—
—
—
F68h
INLVLE
X—
—
—
—
—
INLVLE3
INLVLE2
INLVLE1
—
INLVLE3
—
—
F69h
IOCEP
—
—
—
—
IOCEP3
—
—
F6Ah
IOCEN
—
—
—
—
IOCEN3
—
—
Legend:
Note 1:
2:
x = unknown, u = unchanged, q =depends on condition, - = unimplemented, read as ‘0’, r = reserved. Shaded locations unimplemented, read as ‘0’.
Register present on PIC16F18855/75 devices only.
Unimplemented, read as ‘1’.
SLRD0
INLVLD0
CCDND0
CCDPD0
ANSE0
WPUE0
—
ODCE0
SLRE0
INLVLE0
—
—
—
1111 1111
---- ----
1111 1111
---- ----
—
1111 1111
---- ----
1111 1111
---- ----
—
0000 0000
---- ----
0000 0000
---- ----
—
---- -111
---- ----
---- 0000
---- 0---
---- -000
---- ----
---- -111
---- ----
---- 1111
---- 1---
---- 0---
---- 0---
0000 0000
---- ----
0000 0000
---- ----
—
---- -111
---- ----
---- 0000
---- 0---
---- -000
---- ----
---- -111
---- ----
---- 1111
---- 1---
---- 0---
---- 0---