PIC16LF18854 Datasheet, PDF (7/668 Pages) Microchip Technology – C Compiler Optimized RISC Architecture

PIC16(L)F18856/76
44-pin QFN (8x8)
RC7 1
RD4 2
RD5 3
RD6 4
RD7 5
VSS 6
VDD 7
VDD 8
RB0 9
RB1 10
RB2 11
PIC16(L)F18876
33 RA6
32 RA7
31 VSS
30 VSS
29 VDD
28 VDD
27 RE2
26 RE1
25 RE0
24 RA5
23 RA4
Note 1:
2:
3:
See Table 3 for location of all peripheral functions.
All VDD and all VSS pins must be connected at the circuit board level. Allowing one or more VSS or VDD pins to
float may result in degraded electrical performance or non-functionality.
The bottom pad of the QFN/UQFN package should be connected to VSS at the circuit board level.
 2016 Microchip Technology Inc.
Preliminary
DS40001824A-page 7