PIC16LF18854 Datasheet, PDF (212/668 Pages) Microchip Technology – C Compiler Optimized RISC Architecture

PIC16(L)F18856/76
REGISTER 12-16: WPUB: WEAK PULL-UP PORTB REGISTER
U-0
WPUB7
bit 7
U-0
WPUB6
R/W-0/0
WPUB5
R/W-0/0
WPUB4
R/W-0/0
WPUB3⁽¹⁾
R/W-0/0
WPUB2
R/W-0/0
WPUB1
R/W-0/0
WPUB0
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
bit 7-0
WPUB<7:0>: Weak Pull-up Register bits⁽²⁾
1 = Pull-up enabled
0 = Pull-up disabled
Note 1: If MCLRE = 1, the weak pull-up in RB3 is always enabled; bit WPUB3 is not affected.
2: The weak pull-up device is automatically disabled if the pin is configured as an output.
REGISTER 12-17: ODCONB: PORTB OPEN-DRAIN CONTROL REGISTER
R/W-0/0
ODCB7
bit 7
R/W-0/0
ODCB6
R/W-0/0
ODCB5
R/W-0/0
ODCB4
R/W-0/0
ODCB3
R/W-0/0
ODCB2
R/W-0/0
ODCB1
R/W-0/0
ODCB0
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
bit 7-0
ODCB<7:0>: PORTB Open-Drain Enable bits
For RB<7:0> pins, respectively
1 = Port pin operates as open-drain drive (sink current only)
0 = Port pin operates as standard push-pull drive (source and sink current)
DS40001824A-page 212
Preliminary
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