PIC16LF18854 Datasheet, PDF (234/668 Pages) Microchip Technology – C Compiler Optimized RISC Architecture

PIC16(L)F18856/76
12.14.8 CURRENT-CONTROLLED DRIVE
MODE CONTROL
The CCDPE and CCDNE registers (Register 12-53
and Register 12-54) control the Current-Controlled
Drive mode for both the positive-going and nega-
tive-going drivers. When a CCDPE[y] or CCDNE[y] bit
is set and the CCDEN bit of the CCDCON register is
set, the Current-Controlled mode is enabled for the cor-
responding port pin. When the CCDPE[y] or CCDNE[y]
bit is clear, the Current-Controlled mode for the corre-
sponding port pin is disabled. If the CCDPE[y] or
CCDNE[y] bit is set and the CCDEN bit is clear, opera-
tion of the port pin is undefined (see Section 12.1.1
“Current-Controlled Drive” for current-controlled use
precautions).
12.14.9 PORTE FUNCTIONS AND OUTPUT
PRIORITIES
Each pin defaults to the PORT latch data after Reset.
Other output functions are selected with the peripheral
pin select logic. See Section 13.0 “Peripheral Pin
Select (PPS) Module” for more information.
Analog input functions, such as ADC and comparator
inputs, are not shown in the peripheral pin select lists.
Digital output functions may continue to control the pin
when it is in Analog mode.
12.14.10 PORTE FUNCTIONS AND OUTPUT
PRIORITIES
Each pin defaults to the PORT latch data after Reset.
Other output functions are selected with the peripheral
pin select logic. See Section 13.0 “Peripheral Pin
Select (PPS) Module” for more information.
Analog input functions, such as ADC and comparator
inputs, are not shown in the peripheral pin select lists.
Digital output functions may continue to control the pin
when it is in Analog mode.
DS40001824A-page 234
Preliminary
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