PIC16LF18854 Datasheet, PDF (288/668 Pages) Microchip Technology – C Compiler Optimized RISC Architecture

PIC16(L)F18856/76
REGISTER 19-2: PWMxDCH: PWM DUTY CYCLE HIGH BITS
R/W-x/u
bit 7
R/W-x/u
R/W-x/u
R/W-x/u
R/W-x/u
PWMxDC<9:2>
R/W-x/u
R/W-x/u
R/W-x/u
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
bit 7-0
PWMxDC<9:2>: PWM Duty Cycle Most Significant bits
These bits are the MSbs of the PWM duty cycle. The two LSbs are found in PWMxDCL Register.
REGISTER 19-3: PWMxDCL: PWM DUTY CYCLE LOW BITS
R/W-x/u
R/W-x/u
U-0
U-0
U-0
U-0
U-0
U-0
PWMxDC<1:0>
—
—
—
—
—
—
bit 7
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
bit 7-6
bit 5-0
PWMxDC<1:0>: PWM Duty Cycle Least Significant bits
These bits are the LSbs of the PWM duty cycle. The MSbs are found in PWMxDCH Register.
Unimplemented: Read as ‘0’
DS40001824A-page 288
Preliminary
 2016 Microchip Technology Inc.