PIC16LF18854 Datasheet, PDF (616/668 Pages) Microchip Technology – C Compiler Optimized RISC Architecture

PIC16(L)F18856/76
TABLE 37-9: PLL SPECIFICATIONS
Standard Operating Conditions (unless otherwise stated) VDD 2.5V
Param.
No.
Sym.
Characteristic
Min.
Typ†
Max. Units Conditions
PLL01 FPLLIN PLL Input Frequency Range
4
—
8
MHz
PLL02 FPLLOUT PLL Output Frequency Range
16
—
32 MHz Note 1
PLL03 TPLLST PLL Lock Time from Start-up
—
200
—
s
PLL04 FPLLJIT PLL Output Frequency Stability (Jitter)
-0.25
—
0.25
%
* These parameters are characterized but not tested.
† Data in “Typ” column is at 5V, 25C unless otherwise stated. These parameters are for design guidance
only and are not tested.
Note 1: The output frequency of the PLL must meet the FOSC requirements listed in Parameter D002.
DS40001824A-page 616
Preliminary
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