PIC16LF18854 Datasheet, PDF (148/668 Pages) Microchip Technology – C Compiler Optimized RISC Architecture

PIC16(L)F18856/76
REGISTER 7-17: PIR6: PERIPHERAL INTERRUPT REQUEST REGISTER 6
U-0
U-0
U-0
R/W/HS-0/0 R/W/HS-0/0 R/W/HS-0/0 R/W/HS-0/0
—
bit 7
—
—
CCP5IF
CCP4IF
CCP3IF
CCP2IF
R/W/HS-0/0
CCP1IF
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
HS = Hardware set
bit 7-5
bit 4
bit 3
bit 2
bit 1
bit 0
Unimplemented: Read as ‘0’
CCP5IF: CCP5 Interrupt Flag bit
Value
Capture
Capture occurred
1
(must be cleared in software)
0
Capture did not occur
CCP4IF: CCP4 Interrupt Flag bit
Value
1
0
Capture
Capture occurred
(must be cleared in software)
Capture did not occur
CCP3IF: CCP3 Interrupt Flag bit
Value
Capture
Capture occurred
1
(must be cleared in software)
0
Capture did not occur
CCP2IF: CCP2 Interrupt Flag bit
Value
1
0
Capture
Capture occurred
(must be cleared in software)
Capture did not occur
CCP1IF: CCP1 Interrupt Flag bit
Value
1
0
Capture
Capture occurred
(must be cleared in software)
Capture did not occur
CCPM Mode
Compare
Compare match occurred
(must be cleared in software)
Compare match did not occur
PWM
Output trailing edge occurred
(must be cleared in software)
Output trailing edge did not occur
CCPM Mode
Compare
Compare match occurred
(must be cleared in software)
Compare match did not occur
PWM
Output trailing edge occurred
(must be cleared in software)
Output trailing edge did not occur
CCPM Mode
Compare
Compare match occurred
(must be cleared in software)
Compare match did not occur
PWM
Output trailing edge occurred
(must be cleared in software)
Output trailing edge did not occur
CCPM Mode
Compare
Compare match occurred
(must be cleared in software)
Compare match did not occur
PWM
Output trailing edge occurred
(must be cleared in software)
Output trailing edge did not occur
CCPM Mode
Compare
Compare match occurred
(must be cleared in software)
Compare match did not occur
PWM
Output trailing edge occurred
(must be cleared in software)
Output trailing edge did not occur
Note:
Interrupt flag bits are set when an interrupt
condition occurs, regardless of the state of
its corresponding enable bit or the Global
Enable bit, GIE, of the INTCON register.
User software should ensure the
appropriate interrupt flag bits are clear
prior to enabling an interrupt.
DS40001824A-page 148
Preliminary
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