PIC16LF18854 Datasheet, PDF (282/668 Pages) Microchip Technology – C Compiler Optimized RISC Architecture

PIC16(L)F18856/76
REGISTER 18-5: CMOUT: COMPARATOR OUTPUT REGISTER
U-0
—
bit 7
U-0
U-0
U-0
U-0
U-0
—
—
—
—
—
R-0/0
MC2OUT
R-0/0
MC1OUT
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
bit 7-2
bit 1
bit 0
Unimplemented: Read as ‘0’
MC2OUT: Mirror Copy of C2OUT bit
MC1OUT: Mirror Copy of C1OUT bit
TABLE 18-3: SUMMARY OF REGISTERS ASSOCIATED WITH COMPARATOR MODULE
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
ANSELA
ANSA7 ANSA6 ANSA5
ANSA4
ANSA3
ANSA2
ANSA1
ANSA0
ANSELB
ANSB7 ANSB6 ANSB5
ANSB4
ANSB3
ANSB2
ANSB1
ANSB0
CMxCON0
ON
OUT
—
POL
—
—
HYS
SYNC
CMxCON1
—
—
—
—
—
—
INTP
INTN
CMOUT
—
—
—
—
—
—
MC2OUT
MC1OUT
CWG1AS1
—
AS6E
AS5E
AS4E
AS3E
AS2E
AS1E
AS0E
CWG2AS1
AS6E
AS5E
AS4E
AS3E
AS2E
AS1E
AS0E
CWG3AS1
AS6E
AS5E
AS4E
AS3E
AS2E
AS1E
AS0E
FVRCON
FVREN FVRRDY TSEN
TSRNG
CDAFVR<1:0>
ADFVR<1:0>
DAC1CON0 DAC1EN
—
DAC1OE1 DAC1OE2
DAC1PSS<1:0>
—
DAC1NSS
DAC1CON1
—
—
—
DAC1R<4:0>
INTCON
GIE
PEIE
—
PIE2
—
ZCDIE
—
—
—
—
C2IE
C1IE
PIR2
—
ZCDIF
—
—
—
—
C2IF
C1IF
RxyPPS
―
―
RxyPPS<5:0>
CLCINxPPS
—
—
—
CLCIN0PPS<4:0>
MDSRCPPS
―
―
―
MDSRCPPS<4:0>
T1GPPS
―
―
―
T1GPPS<4:0>
TRISA
TRISA7 TRISA6 TRISA5
TRISA4
TRISA3
TRISA2
TRISA1
TRISA0
TRISB
Legend:
TRISB7 TRISB6 TRISB5
TRISB4
TRISB3
TRISB2
TRISB1
— = unimplemented location, read as ‘0’. Shaded cells are unused by the Comparator module.
TRISB0
Register
on Page
203
211
279
280
282
310
310
310
267
389
389
132
135
144
248
247
247
247
202
210
DS40001824A-page 282
Preliminary
 2016 Microchip Technology Inc.