PIC16LF18854 Datasheet, PDF (423/668 Pages) Microchip Technology – C Compiler Optimized RISC Architecture

PIC16(L)F18856/76
29.0 TIMER2/4/6 MODULE
The Timer2/4/6 modules are 8-bit timers that can
operate as free-running period counters or in
conjunction with external signals that control start, run,
freeze, and reset operation in One-Shot and
Monostable modes of operation. Sophisticated
waveform control such as pulse density modulation are
possible by combining the operation of these timers
with other internal peripherals such as the comparators
and CCP modules. Features of the timer include:
• 8-bit timer register
• 8-bit period register
• Selectable external hardware timer Resets
• Programmable prescaler (1:1 to 1:128)
• Programmable postscaler (1:1 to 1:16)
• Selectable synchronous/asynchronous operation
• Alternate clock sources
• Interrupt-on-period
FIGURE 29-1:
TxRSEL <3:0>
TxINPPS
TxIN PPS
TIMER2 BLOCK DIAGRAM
TxMODE<4:0>
External
Reset
Sources⁽²⁾
TMRx_ers
Edge Detector
Level Detector
Mode Control
(2 clock Sync)
reset
• Three modes of operation:
- Free Running Period
- One-shot
- Monostable
See Figure 29-1 for a block diagram of Timer2. See
Figure 29-2 for the clock source block diagram.
Note:
Three identical Timer2 modules are
implemented on this device. The timers are
named Timer2, Timer4, and Timer6. All
references to Timer2 apply as well to
Timer4 and Timer6. All references to T2PR
apply as well to T4PR and T6PR.
MODE<3>
Rev. 10-000168C
9/10/2015
CCP_pset⁽¹⁾
TxCPOL
TMRx_clk
TxON
Sync
(2 Clocks)
1
0
enable
MODE<4:3>=01
MODE<4:1>=1011
Clear ON
DQ
Prescaler
0
3
Sync
1
TxCKPS<2:0> Fosc/4 TxPSYNC
TMRx ^R
Set flag bit
TMRxIF
Comparator
TMRx_postscaled
Postscaler
4
PRx
TxOUTPS<3:0>
TxCSYNC
Note 1: Signal to the CCP to trigger the PWM pulse.
2: See Table 29.5 for description of CCP interaction in the different TMR modes.
3: See Register 29-4 for external Reset sources.
 2016 Microchip Technology Inc.
Preliminary
DS40001824A-page 423