S912XHZ512F1VAG Datasheet, PDF (96/978 Pages) Freescale Semiconductor, Inc – Covers MC9S12XHZ384, MC9S12XHZ256

Chapter 2 Port Integration Module (S12XHZPIMV1)
2.3.9 Port P
Port P is associated with the chip selects 0 and 2, the Pulse Width Modulator (PWM), the serial
communication interface (SCI1) and the Inter-IC bus (IIC0 and IIC1) modules. Each pin is assigned to
these modules according to the following priority: CS0/CS2 > PWM > SCI1/IIC1/IIC0 > general-purpose
I/O.
When a PWM channel is enabled, the corresponding pin becomes a PWM output with the exception of
PP[5] which can be PWM input or output. Refer to the PWM block description chapter for information on
enabling and disabling the PWM channels.
When the IIC1 module is enabled and MODRR1 is clear, PP[7:6] pins become SCL1 and SDA1
respectively as long as the corresponding PWM channels are disabled. When the IIC0 module is enabled
and MODRR0 is clear, PP[5:4] pins become SCL0 and SDA0 respectively as long as the corresponding
PWM channels are disabled. Refer to the IIC block description chapter for information on enabling and
disabling the IIC bus.
When the SCI1 receiver and transmitter are enabled and MODRR2 is clear, the PP[2] and PP[0] pins
become RXD1 and TXD1 respectively as long as the corresponding PWM channels are disabled. Refer to
the SCI block description chapter for information on enabling and disabling the SCI receiver and
transmitter.
During reset, port P pins are configured as high-impedance inputs.
2.3.9.1 Port P I/O Register (PTP)
Module Base + 0x0018
R
W
SCI1/
IIC1/IIC0:
PWM:
Chip
Select:
Reset
7
PTP7
SCL1
PWM7
CS2
0
6
PTP6
5
PTP5
4
PTP4
3
PTP3
2
PTP2
SDA1
PWM6
CS0
0
SCL0
PWM5
SDA0
PWM4
PWM3
RXD1
PWM2
0
0
0
0
Figure 2-42. Port P I/O Register (PTP)
1
PTP1
PWM1
0
0
PTP0
TXD1
PWM0
0
Read: Anytime. Write: Anytime.
If the associated data direction bit (DDRPx) is set to 1 (output), a read returns the value of the I/O register
bit. If the associated data direction bit (DDRPx) is set to 0 (input), a read returns the value of the pin.
The PWM function takes precedence over the general-purpose I/O function if the associated PWM
channel is enabled. The PWM channels 6-0 are outputs if the respective channels are enabled. PWM
channel 7 can be an output, or an input if the shutdown feature is enabled.
MC9S12XHZ512 Data Sheet, Rev. 1.06
96
Freescale Semiconductor