S912XHZ512F1VAG Datasheet, PDF (849/978 Pages) Freescale Semiconductor, Inc – Covers MC9S12XHZ384, MC9S12XHZ256

Chapter 25
Memory Mapping Control (S12XMMCV3)
Version
Number
v03.00
Revision
Date
25 May 2005
Effective
Date
05/25/2005
v03.01 21 July 2005 07/21/2005
Author
Description of Changes
Generic S12XMMC BlockGuide is meant for S12X
derivatives.
- Added FLEXRAY IP like a Master Block.
- Major Cleanup,.
- Added condional texts to different configurations.
- Added Internal section.
Clarify in details External Spaces accesses and firmware
in single chip modes
Update reviewed wording
25.1 Introduction
This section describes the functionality of the module mapping control (MMC) sub-block of the S12X
platform. The block diagram of the MMC is shown in Figure 25-1.
The MMC module controls the multi-master priority accesses, the selection of internal resources and
external space. Internal buses, including internal memories and peripherals, are controlled in this module.
The local address space for each master is translated to a global memory space.
MC9S12XHZ512 Data Sheet, Rev. 1.06
Freescale Semiconductor
849