S912XHZ512F1VAG Datasheet, PDF (211/978 Pages) Freescale Semiconductor, Inc – Covers MC9S12XHZ384, MC9S12XHZ256

Chapter 5 XGATE (S12XGATEV2)
— 104 hardware triggered channels
— 8 software triggered channels
• Hardware semaphores which are shared between the S12X_CPU and the XGATE module
• Able to trigger S12X_CPU interrupts upon completion of an XGATE transfer
• Software error detection to catch erratic application code
5.1.3 Modes of Operation
There are four run modes on S12X devices.
• Run mode, wait mode, stop mode
The XGATE is able to operate in all of these three system modes. Clock activity will be
automatically stopped when the XGATE module is idle.
• Freeze mode (BDM active)
In freeze mode all clocks of the XGATE module may be stopped, depending on the module
configuration (see Section 5.3.1.1, “XGATE Control Register (XGMCTL)”).
5.1.4 Block Diagram
Figure Figure 5-1 shows a block diagram of the XGATE.
Peripheral Interrupts
S12X_INT
XGATE
Interrupt Flags
Software
Triggers
Semaphores
Software Triggers
RISC Core
Peripherals
S12X_MMC
Figure 5-1. XGATE Block Diagram
S12X_DBG
MC9S12XHZ512 Data Sheet, Rev. 1.06
Freescale Semiconductor
211