S912XHZ512F1VAG Datasheet, PDF (918/978 Pages) Freescale Semiconductor, Inc – Covers MC9S12XHZ384, MC9S12XHZ256

Appendix A Electrical Characteristics
The relative deviation of t_nom is at its maximum for one clock period, and decreases towards zero for larger
number of clock periods (N).
Defining the jitter as:
J(N)
=
⎛
max⎜
⎝
1
–
t-N-m-----_{⋅-a--t-nx----}(_o--N--m---)
,
1
–
N-t--m---⋅^{--i-t-n-n---(-o-N---m--)-}
⎞
⎟
⎠
For N < 1000, the following equation is a good fit for the maximum jitter:
J(N)
=
---^j-¹----
N
+
j2
J(N)
1
5
10
20
N
Figure A-5. Maximum Bus Clock Jitter Approximation
This is very important to notice with respect to timers, serial modules where a prescaler will eliminate the
effect of the jitter to a large extent.
MC9S12XHZ512 Data Sheet, Rev. 1.06
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Freescale Semiconductor