S912XHZ512F1VAG Datasheet, PDF (348/978 Pages) Freescale Semiconductor, Inc – Covers MC9S12XHZ384, MC9S12XHZ256

Chapter 7 Clocks and Reset Generator (S12CRGV6)
7.3.2.10
Reserved Register (FORBYP)
NOTE
This reserved register is designed for factory test purposes only, and is not
intended for general user access. Writing to this register when in special
modes can alter the CRG’s functionality.
Module Base +0x_09
7
6
5
4
3
2
1
0
R
0
0
0
0
0
0
0
0
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 7-13. Reserved Register (FORBYP)
Read: Always read 0x_00 except in special modes
Write: Only in special modes
7.3.2.11
Reserved Register (CTCTL)
NOTE
This reserved register is designed for factory test purposes only, and is not
intended for general user access. Writing to this register when in special test
modes can alter the CRG’s functionality.
Module Base +0x_0A
7
6
5
4
3
2
1
0
R
1
0
0
0
0
0
0
0
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 7-14. Reserved Register (CTCTL)
Read: always read 0x_80 except in special modes
Write: only in special modes
MC9S12XHZ512 Data Sheet, Rev. 1.06
348
Freescale Semiconductor