S912XHZ512F1VAG Datasheet, PDF (886/978 Pages) Freescale Semiconductor, Inc – Covers MC9S12XHZ384, MC9S12XHZ256

Chapter 25 Memory Mapping Control (S12XMMCV3)
25.5.3 On-Chip ROM Control
The MCU offers two modes to support emulation. In the first mode (called generator) the emulator
provides the data instead of the internal FLASH and traces the CPU actions. In the other mode (called
observer) the internal FLASH provides the data and all internal actions are made visible to the emulator.
25.5.3.1 ROM Control in Single-Chip Modes
In single-chip modes the MCU has no external bus. All memory accesses and program fetches are internal
(see Figure 25-27).
MCU
No External Bus
Flash
Figure 25-27. ROM in Single Chip Modes
25.5.3.2 ROM Control in Emulation Single-Chip Mode
In emulation single-chip mode the external bus is connected to the emulator. If the EROMON bit is set,
the internal FLASH provides the data and the emulator can observe all internal CPU actions on the external
bus. If the EROMON bit is cleared, the emulator provides the data (generator) and traces the all CPU
actions (see Figure 25-28).
MCU
Emulator
Observer
Flash
MCU
EROMON = 1
Emulator
Generator
Flash
EROMON = 0
Figure 25-28. ROM in Emulation Single-Chip Mode
MC9S12XHZ512 Data Sheet, Rev. 1.06
886
Freescale Semiconductor