S912XHZ512F1VAG Datasheet, PDF (528/978 Pages) Freescale Semiconductor, Inc – Covers MC9S12XHZ384, MC9S12XHZ256

Chapter 14 Freescale’s Scalable Controller Area Network (S12MSCANV3)
Module Base + 0x000C to Module Base + 0x000D
Access: User read/write⁽¹⁾
7
6
5
4
3
2
1
0
R
0
0
0
0
0
0
0
0
W
Reset:
0
0
0
0
0
0
0
0
= Unimplemented
Figure 14-16. MSCAN Reserved Register
1. Read: Always reads zero in normal system operation modes
Write: Unimplemented in normal system operation modes
NOTE
Writing to this register when in special system operating modes can alter the
MSCAN functionality.
14.3.2.14 MSCAN Miscellaneous Register (CANMISC)
This register provides additional features.
Module Base + 0x000D
Access: User read/write⁽¹⁾
7
6
5
4
3
2
1
R
0
0
0
0
0
0
0
W
Reset:
0
0
0
0
0
0
0
= Unimplemented
Figure 14-17. MSCAN Miscellaneous Register (CANMISC)
1. Read: Anytime
Write: Anytime; write of ‘1’ clears flag; write of ‘0’ ignored
0
BOHOLD
0
Table 14-21. CANMISC Register Field Descriptions
Field
Description
0
BOHOLD
Bus-off State Hold Until User Request — If BORM is set in MSCAN Control Register 1 (CANCTL1), this bit
indicates whether the module has entered the bus-off state. Clearing this bit requests the recovery from bus-off.
Refer to Section 14.5.2, “Bus-Off Recovery,” for details.
0 Module is not bus-off or recovery has been requested by user in bus-off state
1 Module is bus-off and holds this state until user request
14.3.2.15 MSCAN Receive Error Counter (CANRXERR)
This register reflects the status of the MSCAN receive error counter.
MC9S12XHZ512 Data Sheet, Rev. 1.06
528
Freescale Semiconductor