S912XHZ512F1VAG Datasheet, PDF (722/978 Pages) Freescale Semiconductor, Inc – Covers MC9S12XHZ384, MC9S12XHZ256

Chapter 19 Enhanced Capture Timer (ECT16B8CV3)
19.4.3 Interrupts
This section describes interrupts originated by the ECT block. The MCU must service the interrupt
requests. Table 19-39 lists the interrupts generated by the ECT to communicate with the MCU.
Table 19-39. ECT Interrupts
Interrupt Source
Timer channel 7–0
Modulus counter underflow
Pulse accumulator B overflow
Pulse accumulator A input
Pulse accumulator A overflow
Timer overflow
Description
Active high timer channel interrupts 7–0
Active high modulus counter interrupt
Active high pulse accumulator B interrupt
Active high pulse accumulator A input interrupt
Pulse accumulator overflow interrupt
Timer 0verflow interrupt
The ECT only originates interrupt requests. The following is a description of how the module makes a
request and how the MCU should acknowledge that request. The interrupt vector offset and interrupt
number are chip dependent.
19.4.3.1 Channel [7:0] Interrupt
This active high output will be asserted by the module to request a timer channel 7–0 interrupt to be
serviced by the system controller.
19.4.3.2 Modulus Counter Interrupt
This active high output will be asserted by the module to request a modulus counter underflow interrupt to
be serviced by the system controller.
19.4.3.3 Pulse Accumulator B Overflow Interrupt
This active high output will be asserted by the module to request a timer pulse accumulator B overflow
interrupt to be serviced by the system controller.
19.4.3.4 Pulse Accumulator A Input Interrupt
This active high output will be asserted by the module to request a timer pulse accumulator A input
interrupt to be serviced by the system controller.
19.4.3.5 Pulse Accumulator A Overflow Interrupt
This active high output will be asserted by the module to request a timer pulse accumulator A overflow
interrupt to be serviced by the system controller.
MC9S12XHZ512 Data Sheet, Rev. 1.06
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Freescale Semiconductor