S912XHZ512F1VAG Datasheet, PDF (732/978 Pages) Freescale Semiconductor, Inc – Covers MC9S12XHZ384, MC9S12XHZ256

Chapter 20 Voltage Regulator (S12VREG3V3V5)
20.3.2.4 Autonomous Periodical Interrupt Trimming Register (VREGAPITR)
The VREGAPITR register allows to trim the API timeout period.
Module Base + 0x0003
7
6
5
4
3
2
1
0
R
0
0
APITR5
APITR4
APITR3
APITR2
APITR1
APITR0
W
Reset
0¹
0¹
0¹
0¹
0¹
0¹
0
0
1. Reset value is either 0 or preset by factory. See Section 1 (Device Overview) for details.
= Unimplemented or Reserved
Figure 20-5. Autonomous Periodical Interrupt Trimming Register (VREGAPITR)
Table 20-5. VREGAPITR Field Descriptions
Field
Description
7–2
Autonomous Periodical Interrupt Period Trimming Bits — See Table 20-6 for trimming effects.
APITR[5:0]
Table 20-6. Trimming Effect of APIT
Bit
APITR[5]
APITR[4]
APITR[3]
APITR[2]
APITR[1]
APITR[0]
Trimming Effect
Increases period
Decreases period less than APITR[5] increased it
Decreases period less than APITR[4]
Decreases period less than APITR[3]
Decreases period less than APITR[2]
Decreases period less than APITR[1]
MC9S12XHZ512 Data Sheet, Rev. 1.06
732
Freescale Semiconductor