S912XHZ512F1VAG Datasheet, PDF (93/978 Pages) Freescale Semiconductor, Inc – Covers MC9S12XHZ384, MC9S12XHZ256

Chapter 2 Port Integration Module (S12XHZPIMV1)
Table 2-27. RDRM Field Descriptions
Field
Description
5:1
Reduced Drive Port M
RDRM[5:1] 0 Full drive strength at output
1 Associated pin drives at about 1/3 of the full drive strength.
2.3.8.5 Port M Pull Device Enable Register (PERM)
Module Base + 0x0014
7
R
0
W
6
5
4
3
2
1
0
0
0
PERM5
PERM4
PERM3
PERM2
PERM1
Reset
0
0
0
0
0
0
0
0
= Reserved or Unimplemented
Figure 2-38. Port M Pull Device Enable Register (PERM)
Read: Anytime. Write: Anytime.
This register configures whether a pull-up or a pull-down device is activated on configured input or
wired-or output pins. If a pin is configured as push-pull output, the corresponding Pull Device Enable
Register bit has no effect.
Table 2-28. PERM Field Descriptions
Field
5:1
Pull Device Enable Port M
PERM[5:1] 0 Pull-up or pull-down device is disabled.
1 Pull-up or pull-down device is enabled.
Description
2.3.8.6 Port M Polarity Select Register (PPSM)
Module Base + 0x0015
7
R
0
W
6
5
4
3
2
1
0
0
0
PPSM5
PPSM4
PPSM3
PPSM2
PPSM1
Reset
0
0
0
0
0
0
0
0
= Reserved or Unimplemented
Figure 2-39. Port M Polarity Select Register (PPSM)
Read: Anytime. Write: Anytime.
MC9S12XHZ512 Data Sheet, Rev. 1.06
Freescale Semiconductor
93