S912XHZ512F1VAG Datasheet, PDF (304/978 Pages) Freescale Semiconductor, Inc – Covers MC9S12XHZ384, MC9S12XHZ256

Chapter 5 XGATE (S12XGATEV2)
SSEM
Set Semaphore
SSEM
Operation
Attempts to set a semaphore. The state of the semaphore will be stored in the Carry-Flag:
1 = Semaphore is locked by the RISC core
0 = Semaphore is locked by the S12X_CPU
In monadic address mode, bits RS[2:0] select the semaphore to be set.
CCR Effects
NZVC
——— ∆
N: Not affected.
Z: Not affected.
V: Not affected.
C: Set if semaphore is locked by the RISC core; cleared otherwise.
Code and CPU Cycles
Source Form
SSEM #IMM3
SSEM RS
Address
Mode
IMM3
MON
00000
00000
Machine Code
Cycles
IMM3 1 1 1 1 0 0 1 0 PA
RS 1 1 1 1 0 0 1 1 PA
MC9S12XHZ512 Data Sheet, Rev. 1.06
304
Freescale Semiconductor