S912XHZ512F1VAG Datasheet, PDF (828/978 Pages) Freescale Semiconductor, Inc – Covers MC9S12XHZ384, MC9S12XHZ256

Chapter 23 External Bus Interface (S12XEBIV3)
23.5.2.2 Example 2b: Emulation Expanded Mode
This mode is used for emulation systems in which the target application is operating in normal expanded
mode.
If the external bus is used with a PRU, the external device rebuilds the data select and data direction signals
UDS, LDS, RE, and WE from the ADDR0, LSTRB, and RW signals.
Figure 23-6 shows the PRU connection with the available external bus signals in an emulator application.
S12X_EBI
ADDR[22:0]/IVD[15:0]
DATA[15:0]
Emulator
EMULMEM
PRU
PRR
Ports
LSTRB
RW
UDS
LDS
RE
WE
ADDR[22:20]/ACC[2:0]
ADDR[19:16]/
IQSTAT[3:0]
EWAIT
ECLK
ECLKX2
CS[2:0]
Figure 23-6. Application in Emulation Expanded Mode
The timings of accesses with 1 stretch cycle are shown in
• Figure ‘Example 2b: Emulation Expanded Mode — Read with 1 Stretch Cycle’
• Figure ‘Example 2b: Emulation Expanded Mode — Write with 1 Stretch Cycle’
The associated timing numbers are given in
• Table ‘Example 2b: Emulation Expanded Mode Timing V_DD5 = 5.0 V (EWAITE = 0)’ (this also
includes examples for alternative settings of 2 and 3 additional stretch cycles)
Timing considerations:
• If no stretch cycle is added, the timing is the same as in Emulation Single-Chip Mode.
MC9S12XHZ512 Data Sheet, Rev. 1.06
828
Freescale Semiconductor