S912XHZ512F1VAG Datasheet, PDF(125/978 Page) Freescale Semiconductor, Inc – Covers MC9S12XHZ384, MC9S12XHZ256

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S912XHZ512F1VAG Datasheet, PDF (125/978 Pages) Freescale Semiconductor, Inc – Covers MC9S12XHZ384, MC9S12XHZ256

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Chapter 2 Port Integration Module (S12XHZPIMV1)

2.4 Functional Description

Each pin except PE0, PE1, and BKGD can act as general-purpose I/O. In addition the pin can act as an

output from a peripheral module or an input to a peripheral module.

A set of configuration registers is common to all ports. All registers can be written at any time, however a

specific configuration might not become active.

Example: Selecting a pull-up resistor. This resistor does not become active while the port is used

as a push-pull output.

Table 2-65. Register Availability per Port1

Port

Data

Data

Direction

Input

Reduced Pull

Drive Enable

Polarity

Select

Wired-OR

Mode

Slew Rate

Interrupt

Enable

Interrupt

Flag

A

yes

yes

â

yes

yes

â

â

yes

â

â

B

yes

yes

â

â

â

â

â

C

yes

yes

â

â

â

â

â

D

yes

yes

â

â

â

â

â

E

yes

yes

â

â

â

â

â

K

yes

yes

â

â

â

â

â

AD

yes

yes

yes

yes

yes

yes

â

â

yes

yes

L

yes

yes

yes

yes

yes

yes

â

yes

â

â

M

yes

yes

yes

yes

yes

yes

yes

yes

â

â

P

yes

yes

yes

yes

yes

yes

yes

yes

â

â

S

yes

yes

yes

yes

yes

yes

yes

yes

â

â

T

yes

yes

yes

yes

yes

yes

yes

yes

â

â

U

yes

yes

yes

â

yes

yes

â

yes

â

â

V

yes

yes

yes

â

yes

yes

â

yes

â

â

W

yes

yes

yes

â

yes

yes

â

yes

â

â

1 Each cell represents one register with individual conï¬guration bits

2.4.1 I/O Register

The I/O Register holds the value driven out to the pin if the port is used as a general-purpose I/O. Writing

to the I/O Register only has an effect on the pin if the port is used as general-purpose output.

When reading the I/O Register, the value of each pin is returned if the corresponding Data Direction

Register bit is set to 0 (pin configured as input). If the data direction register bits is set to 1, the content of

the I/O Register bit is returned. This is independent of any other configuration (Figure 2-84).

Due to internal synchronization circuits, it can take up to 2 bus cycles until the correct value is read on the

I/O Register when changing the data direction register.

2.4.2 Input Register

The Input Register is a read-only register and generally returns the value of the pin (Figure 2-84).It can be

used to detect overload or short circuit conditions.

MC9S12XHZ512 Data Sheet, Rev. 1.06

Freescale Semiconductor

125

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