S912XHZ512F1VAG Datasheet, PDF (34/978 Pages) Freescale Semiconductor, Inc – Covers MC9S12XHZ384, MC9S12XHZ256

Chapter 1 MC9S12XHZ Family Device Overview
Table 1-5. Signal Properties
Pin
Pin
Name
Name
Function 1 Function 2
Pin
Name
Function 3
Pin
Name
Function 4
Pin
Name
Function 5
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PK7
FP23
ECS
ROMCTL ROMCTL V_DDX1
PK[6:4]
—
ADDR[22:20] ACC[2:0]
—
V_DDX2
PK[3:0] BP[3:0] ADDR[19:16] IQSTAT[3:0]
—
V_DDX1
PL[7:4] FP[31:28] AN[15:12]
—
—
V_DDA
PL[3:0] FP[19:16] AN[11:8]
—
—
V_DDX1
PM5
TXCAN1
—
—
PM4
RXCAN1
—
—
PM3
TXCAN0
—
—
PM2
RXCAN0
—
—
PM1
—
—
CS1
PP7
PWM7
SCL1
CS2
—
V_DDX2
—
V_DDX2
—
V_DDX2
—
V_DDX2
—
V_DDX2
—
V_DDX2
PP6
PWM6
SDA1
CS0
—
V_DDX2
PP5
PWM5
SCL0
—
—
V_DDX2
PP4
PWM4
SDA0
—
—
V_DDX2
PP3
PWM3
—
—
PP2
PWM2
RXD1
—
—
V_DDX2
—
V_DDX2
PP1
PWM1
—
—
PP0
PWM0
TXD1
—
—
V_DDX2
—
V_DDX2
PS7
SS
—
PS6
SCK
—
PS5
MOSI
—
PS4
MISO
—
PS3
TXD1
—
PS2
RXD1
—
—
—
—
—
—
CS3
—
V_DDX2
—
V_DDX2
—
V_DDX2
—
V_DDX2
—
V_DDX2
—
V_DDX2
PS1
TXD0
—
PS0
RXD0
—
—
—
V_DDX2
—
—
V_DDX2
Internal Pull Up
Resistor
CTRL
Reset
State
Description
PUCR
PERL/
PPSL
PERM/
PPSM
PERP/
PPSP
PERS/
PPSS
Down Port K I/O, emulation chip
select, ROM on enable
Port K I/O, extended address,
access source
Port K I/O, LCD driver,
extended address, pipe status
Down Port L I/O, LCD drivers, analog
inputs (ATD)
Port L I/O, LCD drivers, analog
inputs (ATD)
Disabled Port M I/O, TX of CAN1
Port M I/O, RX of CAN1
Port M I/O, TX of CAN0
Port M I/O, RX of CAN0
Port M I/O, chip select 1
Disabled Port P I/O, PWM channel,
SCL of IIC1, chip select 2
Port P I/O, PWM channel, SDA
of IIC1, chip select 0
Port P I/O, PWM channel,
SCL of IIC0
Port P I/O, PWM channel,
SDA of IIC0
Port P I/O, PWM channel
Port P I/O, PWM channel,
RXD of SCI1
Port P I/O, PWM channel
Port P I/O, PWM channel, TXD
of SCI1
Disabled Port S I/O, SS of SPI
Port S I/O, SCK of SPI
Port S I/O, MOSI of SPI
Port S I/O, MISO of SPI
Port S I/O, TXD of SCI1
Port S I/O, RXD of SCI1, chip
select 3
Port S I/O, TXD of SCI0
Port S I/O, RXD of SCI0
MC9S12XHZ512 Data Sheet, Rev. 1.06
34
Freescale Semiconductor