S912XHZ512F1VAG Datasheet, PDF (219/978 Pages) Freescale Semiconductor, Inc – Covers MC9S12XHZ384, MC9S12XHZ256

Chapter 5 XGATE (S12XGATEV2)
5.3.1.2 XGATE Channel ID Register (XGCHID)
The XGATE channel ID register (Figure 5-4) shows the identifier of the XGATE channel that is currently
active. This register will read “$00” if the XGATE module is idle. In debug mode this register can be used
to start and terminate threads (see Section 5.6.1, “Debug Features”).
Module Base +0x0002
7
6
5
4
3
2
1
0
R
0
XGCHID[6:0]
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 5-4. XGATE Channel ID Register (XGCHID)
Read: Anytime
Write: In Debug Mode
Table 5-2. XGCHID Field Descriptions
Field
Description
6–0
Request Identifier — ID of the currently active channel
XGCHID[6:0]
5.3.1.3 XGATE Vector Base Address Register (XGVBR)
The vector base address register (Figure 5-5 and Figure 5-6) determines the location of the XGATE vector
block.
Module Base +0x0006
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
R
0
XGVBR[15:1]
W
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 5-5. XGATE Vector Base Address Register (XGVBR)
Read: Anytime
Write: Only if the module is disabled (XGE = 0) and idle (XGCHID = $00))
Table 5-3. XGVBR Field Descriptions
Field
Description
15–1
Vector Base Address — The XGVBR register holds the start address of the vector block in the XGATE
XBVBR[15:1] memory map.
MC9S12XHZ512 Data Sheet, Rev. 1.06
Freescale Semiconductor
219