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S912XHZ512F1VAG Datasheet, PDF (773/978 Pages) Freescale Semiconductor, Inc – Covers MC9S12XHZ384, MC9S12XHZ256
Chapter 22 S12X Debug (S12XDBGV3) Module
22.3.2.3 Debug Trace Control Register (DBGTCR)
Address: 0x0022
R
W
Reset
7
6
TSOURCE
0
0
5
4
TRANGE
0
0
3
2
TRCMOD
0
0
Figure 22-5. Debug Trace Control Register (DBGTCR)
Read: Anytime
Write: Bits 7:6 only when S12XDBG is neither secure nor armed.
Bits 5:0 anytime the module is disarmed.
1
0
TALIGN
0
0
Table 22-10. DBGTCR Field Descriptions
Field
Description
7–6
Trace Source Control Bits — The TSOURCE bits select the data source for the tracing session. If the MCU
TSOURCE system is secured, these bits cannot be set and tracing is inhibited. See Table 22-11.
5–4
TRANGE
Trace Range Bits — The TRANGE bits allow filtering of trace information from a selected address range when
tracing from the CPU12X in Detail Mode. The XGATE tracing range cannot be narrowed using these bits. To use
a comparator for range filtering, the corresponding COMPE and SRC bits must remain cleared. If the COMPE
bit is not clear then the comparator will also be used to generate state sequence triggers. If the corresponding
SRC bit is set the comparator is mapped to the XGATE buses, the TRANGE bits have no effect on the valid
address range, memory accesses within the whole memory map are traced. See Table 22-12.
3–2
TRCMOD
Trace Mode Bits — See Section 22.4.5.2 for detailed Trace Mode descriptions. In Normal Mode, change of flow
information is stored. In Loop1 Mode, change of flow information is stored but redundant entries into trace
memory are inhibited. In Detail Mode, address and data for all memory and register accesses is stored. See
Table 22-13.
1–0
Trigger Align Bits — These bits control whether the trigger is aligned to the beginning, end or the middle of a
TALIGN tracing session. See Table 22-14.
Table 22-11. TSOURCE — Trace Source Bit Encoding
TSOURCE
Tracing Source
00
No tracing requested
01
CPU12X
10(1)
XGATE
111,(2)
Both CPU12X and XGATE
1. No range limitations are allowed. Thus tracing operates as if TRANGE = 00.
2. No Detail Mode tracing supported. If TRCMOD = 10, no information is stored.
MC9S12XHZ512 Data Sheet Rev. 1.06
Freescale Semiconductor
773