|
S912XHZ512F1VAG Datasheet, PDF (766/978 Pages) Freescale Semiconductor, Inc – Covers MC9S12XHZ384, MC9S12XHZ256 | |||
|
◁ |
Chapter 22 S12X Debug (S12XDBGV3) Module
Term
CPU
Tag
Table 22-2. Glossary Of Terms (continued)
Deï¬nition
CPU12X module
Tags can be attached to XGATE or CPU opcodes as they enter the instruction pipe. If the tagged opcode
reaches the execution stage a tag hit occurs.
22.1.2 Overview
The comparators monitor the bus activity of the CPU12X and XGATE. When a match occurs the control
logic can trigger the state sequencer to a new state. On a transition to the Final State, bus tracing is triggered
and/or a breakpoint can be generated.
Independent of comparator matches a transition to Final State with associated tracing and breakpoint can
be triggered by the external TAGHI and TAGLO signals, or by an XGATE module S/W breakpoint request
or by writing to the TRIG control bit.
The trace buffer is visible through a 2-byte window in the register address map and can be read out using
standard 16-bit word reads. Tracing is disabled when the MCU system is secured.
22.1.3 Features
⢠Four comparators (A, B, C, and D)
â Comparators A and C compare the full address bus and full 16-bit data bus
â Comparators A and C feature a data bus mask register
â Comparators B and D compare the full address bus only
â Each comparator can be conï¬gured to monitor CPU12X or XGATE buses
â Each comparator features selection of read or write access cycles
â Comparators B and D allow selection of byte or word access cycles
â Comparisons can be used as triggers for the state sequencer
⢠Three comparator modes
â Simple address/data comparator match mode
â Inside address range mode, Addmin ⤠Address ⤠Addmax
â Outside address range match mode, Address < Addmin or Address > Addmax
⢠Two types of triggers
â Tagged â This triggers just before a speciï¬c instruction begins execution
â Force â This triggers on the ï¬rst instruction boundary after a match occurs.
⢠The following types of breakpoints
â CPU12X breakpoint entering BDM on breakpoint (BDM)
â CPU12X breakpoint executing SWI on breakpoint (SWI)
â XGATE breakpoint
⢠External CPU12X instruction tagging trigger independent of comparators
⢠XGATE S/W breakpoint request trigger independent of comparators
MC9S12XHZ512 Data Sheet, Rev. 1.06
766
Freescale Semiconductor
|
▷ |