S912XHZ512F1VAG Datasheet, PDF (414/978 Pages) Freescale Semiconductor, Inc – Covers MC9S12XHZ384, MC9S12XHZ256

Chapter 10 Liquid Crystal Display (LCD32F4BV1) Block Description
Address
Offset
0x0000
0x0001
0x0002
0x0003
0x0004
0x0005
0x0006
0x0007
0x0008
0x0009
0x000A
0x000B
0x000C
0x000D
0x000E
0x000F
0x0010
0x0011
0x0012
0x0013
0x0014
0x0015
0x0016
0x0017
Table 10-2. LCD32F4BV1 Memory Map
Use
LCD Control Register 0 (LCDCR0)
LCD Control Register 1 (LCDCR1)
LCD Frontplane Enable Register 0 (FPENR0)
LCD Frontplane Enable Register 1 (FPENR1)
LCD Frontplane Enable Register 2 (FPENR2)
LCD Frontplane Enable Register 3 (FPENR3)
Unimplemented
Unimplemented
LCDRAM (Location 0)
LCDRAM (Location 1)
LCDRAM (Location 2)
LCDRAM (Location 3)
LCDRAM (Location 4)
LCDRAM (Location 5)
LCDRAM (Location 6)
LCDRAM (Location 7)
LCDRAM (Location 8)
LCDRAM (Location 9)
LCDRAM (Location 10)
LCDRAM (Location 11)
LCDRAM (Location 12)
LCDRAM (Location 13)
LCDRAM (Location 14)
LCDRAM (Location 15)
Access
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
MC9S12XHZ512 Data Sheet, Rev. 1.06
414
Freescale Semiconductor