S912XHZ512F1VAG Datasheet, PDF (141/978 Pages) Freescale Semiconductor, Inc – Covers MC9S12XHZ384, MC9S12XHZ256

Chapter 3 512 Kbyte Flash Module (S12XFTX512K4V3)
Table 3-9. Flash Register Bank Selects
BKSEL[1:0]
00
01
10
11
Selected Block
Flash Block 0
Flash Block 1
Flash Block 2
Flash Block 3
3.3.2.5 Flash Protection Register (FPROT)
The FPROT register defines which Flash sectors are protected against program or erase operations.
Module Base + 0x0004
7
R
FPOPEN
W
6
RNV6
5
FPHDIS
4
3
FPHS
2
FPLDIS
Reset
F
F
F
F
F
F
= Unimplemented or Reserved
Figure 3-10. Flash Protection Register (FPROT)
1
0
FPLS
F
F
All bits in the FPROT register are readable and writable with restrictions (see Section 3.3.2.5.1, “Flash
Protection Restrictions”) except for RNV[6] which is only readable.
During the reset sequence, the FPROT register is loaded from the Flash Configuration Field at global
address 0x7F_FF0D. To change the Flash protection that will be loaded during the reset sequence, the
upper sector of the Flash memory must be unprotected, then the Flash Protect/Security byte located as
described in Table 3-1 must be reprogrammed.
Trying to alter data in any protected area in the Flash memory will result in a protection violation error and
the PVIOL flag will be set in the FSTAT register. The mass erase of a Flash block is not possible if any of
the Flash sectors contained in the Flash block are protected.
Table 3-10. FPROT Field Descriptions
Field
Description
7
FPOPEN
6
RNV6
Flash Protection Open — The FPOPEN bit determines the protection function for program or erase as shown
in Table 3-11.
0 The FPHDIS and FPLDIS bits define unprotected address ranges as specified by the corresponding
FPHS[1:0] and FPLS[1:0] bits. For an MCU without an EEPROM module, the FPOPEN clear state allows the
main part of the Flash block to be protected while a small address range can remain unprotected for EEPROM
emulation.
1 The FPHDIS and FPLDIS bits enable protection for the address range specified by the corresponding
FPHS[1:0] and FPLS[1:0] bits.
Reserved Nonvolatile Bit — The RNV[6] bit should remain in the erased state for future enhancements.
MC9S12XHZ512 Data Sheet, Rev. 1.06
Freescale Semiconductor
141