S912XHZ512F1VAG Datasheet, PDF (436/978 Pages) Freescale Semiconductor, Inc – Covers MC9S12XHZ384, MC9S12XHZ256

Chapter 11 Motor Controller (MC10B12CV2) Block Description
11.3.2 Register Descriptions
11.3.2.1 Motor Controller Control Register 0
This register controls the operating mode of the motor controller module.
Offset Module Base + 0x0000
7
6
5
4
3
2
1
R
0
W
0
MCPRE[1:0]
MCSWAI
FAST
DITH
Reset
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 11-3. Motor Controller Control Register 0 (MCCTL0)
0
MCTOIF
0
Table 11-3. MCCTL0 Field Descriptions
Field
Description
6:5
MCPRE[1:0]
Motor Controller Prescaler Select — MCPRE1 and MCPRE0 determine the prescaler value that sets the
motor controller timer counter clock frequency (f_TC). The clock source for the prescaler is the peripheral bus
clock (f_BUS) as shown in Figure 11-22. Writes to MCPRE1 or MCPRE0 will not affect the timer counter clock
frequency f_TC until the start of the next PWM period. Table 11-4 shows the prescaler values that result from
the possible combinations of MCPRE1 and MCPRE0
4
MCSWAI
Motor Controller Module Stop in Wait Mode
0 Entering wait mode has no effect on the motor controller module and the associated port pins maintain the
functionality they had prior to entering wait mode both during wait mode and after exiting wait mode.
1 Entering wait mode will stop the clock of the module and debias the analog circuitry. The
module will release the pins.
3
FAST
Motor Controller PWM Resolution Mode
0 PWM operates in 11-bit resolution mode, duty cycle registers of all channels are switched to word mode.
1 PWM operates in 7-bit resolution (fast) mode, duty cycle registers of all channels are switched to byte mode.
2
DITH
Motor Control/Driver Dither Feature Enable (refer to Section 11.4.1.3.5, “Dither Bit (DITH)”)
0 Dither feature is disabled.
1 Dither feature is enabled.
0
MCTOIF
Motor Controller Timer Counter Overflow Interrupt Flag — This bit is set when a motor controller timer
counter overflow occurs. The bit is cleared by writing a 1 to the bit.
0 A motor controller timer counter overflow has not occurred since the last reset or since the bit was cleared.
1 A motor controller timer counter overflow has occurred.
.
Table 11-4. Prescaler Values
MCPRE[1:0]
00
01
10
11
f_TC
f_Bus
f_Bus/2
f_Bus/4
f_Bus/8
MC9S12XHZ512 Data Sheet, Rev. 1.06
436
Freescale Semiconductor