S912XHZ512F1VAG Datasheet, PDF (110/978 Pages) Freescale Semiconductor, Inc – Covers MC9S12XHZ384, MC9S12XHZ256

Chapter 2 Port Integration Module (S12XHZPIMV1)
2.3.11.5 Port T Pull Device Enable Register (PERT)
Module Base + 0x0004
R
W
Reset
7
PERT7
0
6
PERT6
5
PERT5
4
PERT4
3
PERT3
2
PERT2
1
PERT1
0
0
0
1
1
1
Figure 2-62. Port T Pull Device Enable Register (PERT)
0
PERT0
1
Read: Anytime. Write: Anytime.
This register configures whether a pull-up or a pull-down device is activated on configured input pins. If
a pin is configured as output, the corresponding Pull Device Enable Register bit has no effect.
For port pins PT[7:4], a pull-up device can be activated on wired-or (open drain) output pins. If the pin is
configured as push-pull output, the corresponding Pull Device Enable Register bit has no effect.
Table 2-46. PERT Field Descriptions
Field
7:0
Pull Device Enable Port T
PERT[7:0] 0 Pull-up or pull-down device is disabled.
1 Pull-up or pull-down device is enabled.
Description
2.3.11.6 Port T Polarity Select Register (PPST)
Module Base + 0x0005
R
W
Reset
7
PPST7
0
6
PPST6
5
PPST5
4
PPST4
3
PPST3
2
PPST2
0
0
0
1
1
Figure 2-63. Port T Polarity Select Register (PPST)
1
PPST1
1
0
PPST0
1
Read: Anytime. Write: Anytime.
The Port T Polarity Select Register selects whether a pull-down or a pull-up device is connected to the pin.
The Port T Polarity Select Register is effective only when the corresponding Data Direction Register bit
is set to 0 (input) and the corresponding Pull Device Enable Register bit is set to 1.
If an IIC module is enabled, a pull-up device can be activated on either the SCL or SDA pins. Pull-down
devices can not be activated on IIC pins.
MC9S12XHZ512 Data Sheet, Rev. 1.06
110
Freescale Semiconductor