S912XHZ512F1VAG Datasheet, PDF (57/978 Pages) Freescale Semiconductor, Inc – Covers MC9S12XHZ384, MC9S12XHZ256

Chapter 2
Port Integration Module (S12XHZPIMV1)
2.1 lntroduction
The port integration module establishes the interface between the peripheral modules including the
non-multiplexed external bus interface module (S12X_EBI) and the I/O pins for all ports. It controls the
electrical pin properties as well as the signal prioritization and multiplexing on shared pins.
This section covers:
• Port A, B and K associated with S12X_EBI module and the LCD driver
• Port C and D associated with S12X_EBI module
• Port E associated with S12X_EBI module, the IRQ, XIRQ interrupt inputs, and the LCD driver
• Port AD associated with ATD module (channels 7 through 0) and keyboard wake-up interrupts
• Port L connected to the LCD driver and ATD (channels 15 through 8) modules
• Port M connected to 2 CAN modules
• Port P connected to 1 SCI, 2 IIC and PWM modules
• Port S connected to 2 SCI and 1 SPI modules
• Port T connected to 2 IIC, 1 ECT and LCD driver modules
• Port U, V and W associated with PWM motor control and stepper stall detect modules
Each I/O pin can be configured by several registers: input/output selection, drive strength reduction,
enable and select of pull resistors, wired-or mode selection, interrupt enable, and/or status flags.
2.1.1 Features
A standard port has the following minimum features:
• Input/output selection
• 5-V output drive with two selectable drive strength (or slew rates)
• 5-V digital and analog input
• Input with selectable pull-up or pull-down device
Optional features:
• Open drain for wired-OR connections
• Interrupt input with glitch filtering
MC9S12XHZ512 Data Sheet, Rev. 1.06
Freescale Semiconductor
57