S912XHZ512F1VAG Datasheet, PDF (181/978 Pages) Freescale Semiconductor, Inc – Covers MC9S12XHZ384, MC9S12XHZ256

Chapter 4 4 Kbyte EEPROM Module (S12XEETX4KV2)
Module Base + 0x0002
7
6
5
4
3
2
1
0
R
0
0
0
0
0
0
0
0
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 4-6. RESERVED2
All bits read 0 and are not writable.
4.3.2.4 EEPROM Configuration Register (ECNFG)
The ECNFG register enables the EEPROM interrupts.
Module Base + 0x0003
7
6
5
4
3
2
1
0
R
0
0
0
0
0
0
CBEIE
CCIE
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 4-7. EEPROM Configuration Register (ECNFG)
CBEIE and CCIE bits are readable and writable while all remaining bits read 0 and are not writable.
Field
7
CBEIE
6
CCIE
Table 4-3. ECNFG Field Descriptions
Description
Command Buffer Empty Interrupt Enable — The CBEIE bit enables an interrupt in case of an empty command
buffer in the EEPROM module.
0 Command Buffer Empty interrupt disabled.
1 An interrupt will be requested whenever the CBEIF flag (see Section 4.3.2.6, “EEPROM Status Register
(ESTAT)”) is set.
Command Complete Interrupt Enable — The CCIE bit enables an interrupt in case all commands have been
completed in the EEPROM module.
0 Command Complete interrupt disabled.
1 An interrupt will be requested whenever the CCIF flag (see Section 4.3.2.6, “EEPROM Status Register
(ESTAT)”) is set.
MC9S12XHZ512 Data Sheet, Rev. 1.06
Freescale Semiconductor
181