S912XHZ512F1VAG Datasheet, PDF (40/978 Pages) Freescale Semiconductor, Inc – Covers MC9S12XHZ384, MC9S12XHZ256

Chapter 1 MC9S12XHZ Family Device Overview
1.2.3.14 PE5 / MODA / TAGLO / RE — Port E I/O Pin 5
PE5 is a general-purpose input or output pin. It is used as a MCU operating mode select pin during reset.
The state of this pin is latched to the MODA bit at the rising edge of RESET. This pin is shared with the
read enable RE output. This pin is an input with a pull-down device which is only active when RESET is
low. TAGLO is used to tag the low half of the instruction word being read into the instruction queue.
The input voltage threshold for PE5 can be configured to reduced levels, to allow data from an external
3.3-V peripheral to be read by the MCU operating at 5.0 V. The input voltage threshold for PE5 is
configured to reduced levels out of reset in expanded and emulation modes.
1.2.3.15 PE4 / ECLK — Port E I/O Pin 4
PE4 is a general-purpose input or output pin. It can be configured to drive the internal bus clock ECLK.
ECLK can be used as a timing reference.
1.2.3.16 PE3 / FP21 / LSTRB / LDS / EROMCTL— Port E I/O Pin 3
PE3 is a general-purpose input or output pin. It can be configured as frontplane segment driver output FP21
of the LCD module. In MCU expanded modes of operation, LSTRB or LDS can be used for the low byte
strobe function to indicate the type of bus access. At the rising edge of RESET the state of this pin is
latched to the EROMON bit.
1.2.3.17 PE2 / FP20 / R/W / WE— Port E I/O Pin 2
PE2 is a general-purpose input or output pin. It can be configured as frontplane segment driver output FP20
of the LCD module. In MCU expanded modes of operations, this pin drives the read/write output signal or
write enable output signal for the external bus. It indicates the direction of data on the external bus.
1.2.3.18 PE1 / IRQ — Port E Input Pin 1
PE1 is a general-purpose input pin and the maskable interrupt request input that provides a means of
applying asynchronous interrupt requests. This will wake up the MCU from stop or wait mode.
1.2.3.19 PE0 / XIRQ — Port E Input Pin 0
PE0 is a general-purpose input pin and the non-maskable interrupt request input that provides a means of
applying asynchronous interrupt requests. This will wake up the MCU from stop or wait mode.
1.2.3.20 PK7 / FP23 / EWAIT / ROMCTL — Port K I/O Pin 7
PK7 is a general-purpose input or output pin. It can be configured as frontplane segment driver output
FP23 of the LCD module. During MCU emulation modes and normal expanded modes of operation, this
pin is used to enable the Flash EEPROM memory in the memory map (ROMCTL). At the rising edge of
RESET, the state of this pin is latched to the ROMON bit. The EWAIT input signal maintains the external
bus access until the external device is ready to capture data (write) or provide data (read).
MC9S12XHZ512 Data Sheet, Rev. 1.06
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Freescale Semiconductor