S912XHZ512F1VAG Datasheet, PDF (140/978 Pages) Freescale Semiconductor, Inc – Covers MC9S12XHZ384, MC9S12XHZ256

Chapter 3 512 Kbyte Flash Module (S12XFTX512K4V3)
3.3.2.4 Flash Configuration Register (FCNFG)
The FCNFG register enables the Flash interrupts and gates the security backdoor writes.
Module Base + 0x0003
7
6
5
4
3
2
1
0
R
0
0
0
0
0
CBEIE
CCIE
KEYACC
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 3-8. Flash Configuration Register (FCNFG — Normal Mode)
Module Base + 0x0003
R
W
Reset
7
6
5
4
3
2
1
0
0
0
0
CBEIE
CCIE
KEYACC
BKSEL
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 3-9. Flash Configuration Register (FCNFG — Special Mode)
CBEIE, CCIE and KEYACC bits are readable and writable while all remaining bits read 0 and are not
writable in normal mode. KEYACC is only writable if KEYEN (see Section 3.3.2.2, “Flash Security
Register (FSEC)” is set to the enabled state. BKSEL is readable and writable in special mode to simplify
mass erase and erase verify operations. When writing to the FCNFG register in special mode, all
unimplemented/ reserved bits must be written to 0.
Table 3-8. FCNFG Field Descriptions
Field
Description
7
CBEIE
Command Buffer Empty Interrupt Enable — The CBEIE bit enables an interrupt in case of an empty command
buffer in the Flash module.
0 Command buffer empty interrupt disabled.
1 An interrupt will be requested whenever the CBEIF flag (see Section 3.3.2.6, “Flash Status Register (FSTAT)”)
is set.
6
CCIE
Command Complete Interrupt Enable — The CCIE bit enables an interrupt in case all commands have been
completed in the Flash module.
0 Command complete interrupt disabled.
1 An interrupt will be requested whenever the CCIF flag (see Section 3.3.2.6, “Flash Status Register (FSTAT)”)
is set.
5
KEYACC
Enable Security Key Writing
0 Flash writes are interpreted as the start of a command write sequence.
1 Writes to Flash array are interpreted as keys to open the backdoor. Reads of the Flash array return invalid
data.
1:0
Block Select — The BKSEL[1:0] bits indicates which register bank is active according to Table 3-9.
BKSEL[1:0]
MC9S12XHZ512 Data Sheet, Rev. 1.06
140
Freescale Semiconductor