S912XHZ512F1VAG Datasheet, PDF (187/978 Pages) Freescale Semiconductor, Inc – Covers MC9S12XHZ384, MC9S12XHZ256

Chapter 4 4 Kbyte EEPROM Module (S12XEETX4KV2)
Module Base + 0x000B
7
6
5
4
3
2
1
0
R
EDLO
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 4-16. EEPROM Data Low Register (EDATALO)
All EDHI and EDLO bits read 0 and are not writable in normal modes.
All EDHI and EDLO bits are readable and writable in special modes.
4.4 Functional Description
4.4.1 EEPROM Command Operations
Write operations are used to execute program, erase, erase verify, sector erase abort, and sector modify
algorithms described in this section. The program, erase, and sector modify algorithms are controlled by
a state machine whose timebase, EECLK, is derived from the oscillator clock via a programmable divider.
The command register as well as the associated address and data registers operate as a buffer and a register
(2-stage FIFO) so that a second command along with the necessary data and address can be stored to the
buffer while the first command is still in progress. Buffer empty as well as command completion are
signalled by flags in the EEPROM status register with interrupts generated, if enabled.
The next sections describe:
1. How to write the ECLKDIV register
2. Command write sequences to program, erase, erase verify, sector erase abort, and sector modify
operations on the EEPROM memory
3. Valid EEPROM commands
4. Effects resulting from illegal EEPROM command write sequences or aborting EEPROM
operations
4.4.1.1 Writing the ECLKDIV Register
Prior to issuing any EEPROM command after a reset, the user is required to write the ECLKDIV register
to divide the oscillator clock down to within the 150 kHz to 200 kHz range. Since the program and erase
timings are also a function of the bus clock, the ECLKDIV determination must take this information into
account.
If we define:
• ECLK as the clock of the EEPROM timing control block
• Tbus as the period of the bus clock
• INT(x) as taking the integer part of x (e.g., INT(4.323)=4)
MC9S12XHZ512 Data Sheet, Rev. 1.06
Freescale Semiconductor
187