S912XHZ512F1VAG Datasheet, PDF (470/978 Pages) Freescale Semiconductor, Inc – Covers MC9S12XHZ384, MC9S12XHZ256

Chapter 12 Stepper Stall Detector (SSDV1) Block Description
12.3.2.4 Stepper Stall Detector Flag Register (SSDFLG)
Module Base + 0x0003
7
6
5
4
3
2
1
R
0
0
0
0
0
0
MCZIF
W
Reset
0
0
0
0
0
0
0
= Unimplemented or Reserved
Read: anytime
Figure 12-5. Stepper Stall Detector Flag Register (SSDFLG)
Write: anytime.
l
Table 12-10. SSDFLG Field Descriptions
0
AOVIF
0
Field
7
MCZIF
0
AOVIF
Description
Modulus Counter Underflow Interrupt Flag — This flag is set when the modulus down-counter reaches
0x0000. If not masked (MCZIE = 1), a modulus counter underflow interrupt is pending while this flag is set. This
flag is cleared by writing a ‘1’ to the bit. A write of ‘0’ has no effect.
Accumulator Overflow Interrupt Flag — This flag is set when the Integration Accumulator has a positive or
negative overflow. If not masked (AOVIE = 1), an accumulator overflow interrupt is pending while this flag is set.
This flag is cleared by writing a ‘1’ to the bit. A write of ‘0’ has no effect.
12.3.2.5 Modulus Down-Counter Count Register (MDCCNT)
Module Base + 0x0004
15
14
13
12
11
10
9
8
R
MDCCNT
W
Reset
1
1
1
1
1
1
1
1
Figure 12-6. Modulus Down-Counter Count Register High (MDCCNT)
Module Base + 0x0005
7
6
5
4
3
2
1
0
R
MDCCNT
W
Reset
1
1
1
1
1
1
1
1
Read: anytime
Figure 12-7. Modulus Down-Counter Count Register Low (MDCCNT)
Write: anytime.
MC9S12XHZ512 Data Sheet, Rev. 1.06
470
Freescale Semiconductor