S912XHZ512F1VAG Datasheet, PDF (162/978 Pages) Freescale Semiconductor, Inc – Covers MC9S12XHZ384, MC9S12XHZ256

Chapter 3 512 Kbyte Flash Module (S12XFTX512K4V3)
START
Read: FCLKDIV register
Clock Register
Written
Check
FDIVLD
Set?
yes
no
Write: FCLKDIV register
NOTE: FCLKDIV needs to
be set once after each reset.
Read: FSTAT register
Address, Data,
Command
Buffer Empty Check
CBEIF
no
Set?
yes
Access Error and
Protection Violation
Check
ACCERR/
yes
PVIOL
Set?
no
Write: Flash Address
1. _{and program Data}
Simultaneous
Multiple Flash Block
Decision
2.
Next
yes
Flash
Block?
no
Write: FCMD register
Program Command 0x20
3.
Write: FSTAT register
Clear CBEIF 0x80
Read: FSTAT register
Write: FSTAT register
Clear ACCERR/PVIOL 0x30
Decrement Global Address
by 128K
Bit Polling for
Buffer Empty
Check
Sequential
Programming
Decision
CBEIF
no
Set?
yes
Next
yes
Word?
no
Read: FSTAT register
Bit Polling for
Command Completion
Check
CCIF
no
Set?
yes
EXIT
Figure 3-28. Example Program Command Flow
MC9S12XHZ512 Data Sheet, Rev. 1.06
162
Freescale Semiconductor