S912XHZ512F1VAG Datasheet, PDF (905/978 Pages) Freescale Semiconductor, Inc – Covers MC9S12XHZ384, MC9S12XHZ256

Appendix A Electrical Characteristics
A.2.3 ATD Accuracy
Table A-13 specifies the ATD conversion performance excluding any errors due to current injection, input
capacitance, and source resistance.
Table A-13. ATD Conversion Performance
Conditions are shown in Table A-4 unless otherwise noted
V_REF = V_RH–V_RL = 5.12 V. Resulting to one 8-bit count = 20 mV and one 10-bit count = 5 mV
f_ATDCLK = 2.0 MHz
Num C
Rating
Symbol
Min
Typ
Max
Unit
1 P 10-bit resolution
LSB
—
5
2 P 10-bit differential nonlinearity
DNL
–1
—
3 P 10-bit integral nonlinearity
4 P 10-bit absolute error (Port AD)¹
5 P 10-bit absolute error (Port L)¹
INL
–2.5
±1.5
AE
–3
±2.0
AE
–4
±3.0
6 P 8-bit resolution
LSB
—
20
7 P 8-bit differential nonlinearity
DNL
–0.5
—
8 P 8-bit integral nonlinearity
INL
–1.0
±0.5
9 P 8-bit absolute error (Port AD)¹
AE
–1.5
±1.0
9 P 8-bit absolute error (Port L)¹
AE
–2.0
±1.5
1 _{These values include the quantization error which is inherently 1/2 count for any A/D converter.}
—
mV
1
Counts
2.5 Counts
3
Counts
4
Counts
—
mV
0.5 Counts
1.0 Counts
1.5 Counts
2.0 Counts
A.2.3.1 ATD Accuracy Definitions
For the following definitions see also Figure A-1.
Differential non-linearity (DNL) is defined as the difference between two adjacent switching steps.
DNL(i) = ^V-----ⁱ--₁-^–--_L---^V-_S---^iB---^–-----¹- – 1
The integral non-linearity (INL) is defined as the sum of all DNLs:
n
∑ ^{INL(n) =}
DNL(i) = ^V----₁-ⁿ--_L---^–-_S---^VB-----⁰- – n
i=1
MC9S12XHZ512 Data Sheet, Rev. 1.06
Freescale Semiconductor
905